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as1751, as1752, as1753 high-speed, low-voltage, single-supply, 0.9 , quad spst analog switches www.austriamicrosystems.com revision 1.41 1 - 16 data sheet 1 general description the as1751/as1752/as1753 are high-speed, low-volt- age, quad single-pole/single-throw (spst) analog switches. fast switching speeds, low on-resistance, and low power consumption make these devices ideal for single- cell battery powered applications. these highly-reliable devices operate from a single +1.6 to +3.6v supply, and are differentiated by the type and number of switches: as1751 ? four normally open (no) switches as1752 ? four normally closed (nc) switches as1753 ? two no switches and two nc switches the as1753 supports brea k-before-make switching. with very low on-resistance (r on ), r on matching and r on flatness, the devices can accurately sw itch signals for sample and hold circuits, digital filters, and op-amp gain switching networks. the as1751/as1752/as1753 digital logic input is 1.8v cmos-compatible when using a +3v supply, and all devices can handle rail-to-rail signals. the devices are available in a 3mm x 3mm 16-pin tqfn package and a 14-pin tssop package. figure 1. 14-pin tssop block diagrams 2 key features on-resistance: -0.9 (+3v supply) -2.5 (+1.8v supply) r on matching: -0.12 (+3v supply) -0.25 (+1.8v supply) r on flatness: 0.1 (+3v supply) supply voltage range: +1.6 to +3.6v switching speed: t on = 22ns, t off = 14ns current-handling: 250ma continuous break-before-make switching (as1753) rail-to-rail signal handling 1.8v cmos logic compatible (+3v supply) operating temperature range: -40 to +85oc package types: - 16-pin tqfn (3mm x 3mm) - 14-pin tssop 3 applications the devices are ideal for us e in power routing systems, cordless and mobile phones, mp3 players, cd and dvd players, pdas, handheld computers, digital cameras, hard drives, and any other application where high-speed signal switching is required. as1752 1 nc1 2 com1 3 nc2 4 com2 5 in2 6 in3 7 gnd 14 v+ 13 in1 12 in4 11 nc4 10 com4 9 com3 8 nc3 as1753 1 no1 2 com1 3 nc2 4 com2 5 in2 6 in3 7 gnd 14 v+ 13 in1 12 in4 11 nc4 10 com4 9 com3 8 no3 as1751 1 no1 2 com1 3 no2 4 com2 5 in2 6 in3 7 gnd 14 v+ 13 in1 12 in4 11 no4 10 com4 9 com3 8 no3 device input switch state as1751 low off high on as1752 low on high off as1753 low switches 1, 3 = off switches 2, 4 = on high switches 1, 3 = on switches 2, 4 = off
www.austriamicrosystems.com revision 1.41 2 - 16 as1751/as1752/as1753 data sheet - pinout 4 pinout pin assignments figure 2. tqfn pin assignments (top view) figure 3. tssop pin assignments (top view) pin descriptions table 1. pin descriptions pin number pin name description (see figure 2 and figure 3 ) com1:com4 analog switch 1, 2, 3, 4 common gnd ground in1:in4 analog switch 1, 2, 3, 4 logic control input nc1:nc4 analog switch 1, 2, 3, 4 normally closed terminal no1:no4 analog switch 1, 2, 3, 4 normally open terminal v+ input supply voltage . +1.6 to +3.6v 15 no1 as1753 16 com1 14 v+ 13 in1 11 nc4 12 in4 10 ? 9 com4 6 gnd 5 in3 7 no3 8 com3 2 com2 1 nc2 3 ? 4 in2 15 nc1 as1752 16 com1 14 v+ 13 in1 11 nc4 12 in4 10 ? 9 com4 6 gnd 5 in3 7 nc3 8 com3 2 com2 1 nc2 3 ? 4 in2 15 no1 as1751 16 com1 14 v+ 13 in1 11 no4 12 in4 10 ? 9 com4 6 gnd 5 in3 7 no3 8 com3 2 com2 1 no2 3 ? 4 in2 as1751 14 v+ 8 no3 9 com3 12 in4 1 no1 7 gnd 6 in3 3 no2 11 no4 4 com2 10 com4 5 in2 13 in1 2 com1 as1752 14 v+ 8 nc3 9 com3 12 in4 1 nc1 7 gnd 6 in3 3 nc2 11 nc4 4 com2 10 com4 5 in2 13 in1 2 com1 as1753 14 v+ 8 no3 9 com3 12 in4 1 no1 7 gnd 6 in3 3 nc2 11 nc4 4 com2 10 com4 5 in2 13 in1 2 com1
www.austriamicrosystems.com revision 1.41 3 - 16 as1751/as1752/as1753 data sheet - absolute maximum ratings 5 absolute maximum ratings stresses beyond those listed in table 2 may cause permanent damage to the device. these are stress ratings only, and functional operation of the de vice at these or any other cond itions beyond those indicated in electrical character- istics on page 4 is not implied. exposure to absolute maximum ra ting conditions for extended periods may affect device reliability. ? signals on pins com1, com3, no1, no2, nc1, or nc2 t hat exceed v+ or gnd are clamped by internal diodes. for- ward-diode current should be limit ed to the maximum current rating. table 2. absolute maximum ratings parameter min max units comments v+, in x to gnd -0.3 +5 v com x , no x , nc x to gnd ? -0.3 v+ + 0.3 v com x , no x , nc x continuous current -250 +250 ma com x , no x , nc x peak current -350 +350 ma pulsed at 1ms 10% duty cycle continuous power dissipation (t amb = +70oc) 16-pin tqfn 727 mw derate at 9.1w/oc above +70oc 14-pin tssop 1349 derate at 16.9w/oc above +70oc operating temperature range -40 +85 oc electro-static discharge 2500 v hbm mil-std883e 3015.7 methods latch up immunity 250 ma norm: jedec 17 junction temperature +150 oc storage temperature range -65 +150 oc package body temperature +260 oc the reflow peak soldering temperature (body temperature) specified is in accordance with ipc/jedec j-std-020c ?moisture/reflow sensitivity classification for non-hermetic solid state surface mount devices?
www.austriamicrosystems.com revision 1.41 4 - 16 as1751/as1752/as1753 data sheet - electrical characteristics 6 electrical characteristics v+ = +2.7 to +3.6v, v ih = +1.4v, v il = +0.5v, t amb = t min to t max (unless otherwise specified). typ values @ v+ = +3.0v, t amb = +25oc. table 3. power supply characteristics symbol parameter conditions min typ max unit v+ power supply range t amb = t min to t max 1.6 3.6 v i+ positive supply current v+ = 3.6v, v in x = 0 or v+, t amb = +25oc 0.1 a table 4. +3v supply electrical characteristics symbol parameter conditions min typ max unit analog switch v com x , v no x , v nc x analog signal range 0 v+ v r on on-resistance v+ = 2.7v, i com x = 100ma, v no x or v nc x = 1.5v t amb = +25oc 0.4 0.9 t amb = t min to t max 1 r on on-resistance match between channels 1 v+ = 2.7v, i com x = 100ma, v no x or v nc x = 1.5v t amb = +25oc 0.03 0.12 t amb = t min to t max 0.15 r flat(on) on-resistance flatness 2 v+ = 2.7v, i com x = 100ma, v no x or v nc x = 1, 1.5, or 2v t amb = +25oc 0.02 0.1 t amb = t min to t max 0.12 i no x (off) , i nc x (off) no x or nc x off-leakage current v+ = 3.6v, v com x = 0.3 or 3.6v, v no x or v nc x = 3.6 or 0.3v t amb = +25oc -2.5 +2.5 na t amb = t min to t max -10 +10 i com x (off) com x off-leakage current v+ = 3.6v, v com x = 0.3 or 3.6v, v no x or v nc x = 3.6 or 0.3v t amb = +25oc -2.5 +2.5 na t amb = t min to t max -10 +10 i com x (on) com x on-leakage current v+ = 3.6v, v com x = 0.3 or 3.6v, v no x or v nc x = 0.3 or 3.6v t amb = +25oc -2.5 +2.5 na t amb = t min to t max -10 +10 switch dynamic characteristics t on turn on time 3 v no x or v nc x = 1.5v, r load = 50 , c load = 35pf, figures 13, 14 t amb = +25oc 16 22 ns t amb = t min to t max 24 t off turn off time 3 v no x or v nc x = 1.5v, r load = 50 , c load = 35pf, figures 13, 14 t amb = +25oc 5 14 ns t amb = t min to t max 15 t bbm break-before-make 3 v no x or v nc x = 1.5v, r load = 50 , c load = 35pf, figure 15 (as1753) t amb = +25oc 11 ns t amb = t min to t max 2 q charge injection v gen = v+, r gen = 0, c load = 1.0nf, figure 16 2pc c off no x , nc x off-capacitance f = 1mhz, figure 17 45 pf c com x (off) com x off-capacitance f = 1mhz, figure 17 49 pf c com x (on) com x on-capacitance f = 1mhz, figure 17 85 pf
www.austriamicrosystems.com revision 1.41 5 - 16 as1751/as1752/as1753 data sheet - electrical characteristics v+ = +1.8v, v ih = +1.0v, v il = 0.4v, t amb = t min to t max (unless otherwise specified). typ values @ t amb = +25oc. 1. r on = r on(max) - r on(min) . 2. flatness is defined as the difference between the maxi mum and the minimum value of on-resistance as measured over the specified analog signal ranges. 3. guaranteed by design. 4. off-isolation = 20log10(v com x /v no x ), v com x = output, v no x = input to off switch. 5. between two switches. v iso off-isolation 4 f = 10mhz, r load = 50 , c load = 5pf, figure 18 -40 db f = 1mhz, r load = 50 , c load = 5pf, figure 18 -55 crosstalk 5 f = 10mhz, r load = 50 , c load = 5pf, figure 18 -70 db f = 1mhz, r load = 50 , c load = 5pf, figure 18 -80 thd total harmonic distortion f = 20hz to 20khz, v com x = 2vp-p, r load = 32 0.033 % logic input v ih input logic high 1.4 v v il input logic low 0.5 v i in input leakage current v in x = 0 or v+ -1 0.0001 +1 a table 5. +1.8v supply electrical characteristics symbol parameter conditions min typ max unit analog switch v com x , v no x , v nc x analog signal range 0v+v r on on-resistance v+ = 1.8v, i com x = 10ma, v no x or v nc x = 0.9v t amb = +25oc 0.9 2.5 t amb = t min to t max 3 r on on-resistance match between channels 1 v+ = 1.8v, i com x = 10ma, v no x or v nc x = 0.9v t amb = +25oc 0.05 0.25 t amb = t min to t max 0.25 switch dynamic characteristics t on turn on time 3 v no x or v nc x = 1.0v, r load = 50 , c load = 35pf, figures 13, 14 t amb = +25oc 22 30 ns t amb = t min to t max 35 t off turn off time 3 v no x or v nc x = 1.0v, r load = 50 , c load = 35pf, figures 13, 14 t amb = +25oc 12 20 ns t amb = t min to t max 25 q charge injection v gen = v+, r gen = 0, c load = 1.0nf, figure 16 1pc logic input v ih input logic high 1.0 v v il input logic low 0.4 v i in input leakage current v in x = 0 or v+ -1 0.0001 +1 a table 4. +3v supply electrical characteristics (continued) symbol parameter conditions min typ max unit
www.austriamicrosystems.com revision 1.41 6 - 16 as1751/as1752/as1753 data sheet - typical operating characteristics 7 typical operating characteristics figure 4. frequency response figure 5. total harmonic distortion vs. frequency figure 6. turn on/turn off time vs. temperature figure 7. turn on/off time vs. supply voltage figure 8. r on vs. v com and temperature; v dd = 2.7v figure 9. r on vs. v com -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 0 10 0.01 0.1 1 10 100 1000 frequency (mhz) response (db) bandwidth 0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04 1 10 100 1000 10000 100000 frequency (hz) thd (%) v dd = 3v 0 2 4 6 8 10 12 14 16 18 20 22 24 26 1.6 2 2.4 2.8 3.2 3.6 supply voltage (v) time (ns) t on t off 0 2 4 6 8 10 12 14 16 18 20 -40 -15 10 35 60 85 temperature (c) time (ns) t on t off 0.20 0.25 0.30 0.35 0.40 0.45 0.50 0 0.5 1 1.5 2 2.5 3 v com (v) r on ( ) 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 0 0.5 1 1.5 2 2.5 3 3.5 v com (v) r on ( ) temp = -40oc v dd = 1.8v v dd = 2.5v v dd = 2.7v v dd = 3v v dd = 3.6v v dd = 2v v dd = 3.3v temp = +25oc temp = +85oc
www.austriamicrosystems.com revision 1.41 7 - 16 as1751/as1752/as1753 data sheet - typical operating characteristics figure 10. charge injection vs. v com 0 10 20 30 40 50 60 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3 v com (v) q (pc) v dd = 1.8v v dd = 3v
www.austriamicrosystems.com revision 1.41 8 - 16 as1751/as1752/as1753 data sheet - detailed description 8 detailed description the as1751/as1752/as1753 are low on-resistance, low-voltag e, quad analog spst switch es that operate from a single +1.6 to +3.6v supply. cmos process technology allows switching of analog signals that are within the supply voltage range (gnd to v+). figure 11. 16-pin tqfn block diagrams on-resistance when powered from a +3v supply, the low (0.9 , max) on-resistance allows high-speed, continuous signals to be switched in a variety of applications. bi-directional switching pins no x , nc x , and com x are bi-directional, thus they can be used as inputs to- or outputs from other components. analog signal levels analog signals ranging over the entire supply voltage range (v + to gnd) can be switched with very little change in on- resistance (see typical operating characteristics on page 6 ). logic inputs the devices? logic inputs can be driven up to +3.6v regardl ess of the supply voltage value. for example, with a +1.8v supply, in x may be driven low to gnd and high to +3.6v. this allows the devices to interface with +3v systems using a supply of less than 3v. table 6. truth tables device input switch state as1751 low off high on as1752 low on high off as1753 low switches 1, 3 = off switches 2, 4 = on high switches 1, 3 = on switches 2, 4 = off as1751 2 com2 3 n/c 4 in2 1 no2 6 gnd 8 com3 5 in3 7 no3 11 no4 10 n/c 9 com4 12 in4 com1 16 as1752 2 com2 3 n/c 4 in2 1 nc2 6 gnd 8 com3 5 in3 7 nc3 11 nc4 10 n/c 9 com4 12 in4 as1753 2 com2 3 n/c 4 in2 1 nc2 6 gnd 8 com3 5 in3 7 no3 11 nc4 10 n/c 9 com4 12 in4 no1 15 v+ 14 in1 13 com1 16 nc1 15 v+ 14 in1 13 com1 16 no1 15 v+ 14 in1 13
www.austriamicrosystems.com revision 1.41 9 - 16 as1751/as1752/as1753 data sheet - application information 9 application information power supply sequencing proper power-supply sequencing is critical for proper switch o peration. the power supplies should be started up in the following sequence: 1. v+ 2. no x, nc x, com x note: do not exceed the absolute maximum ratings (see page 2) . overvoltage protection on-resistance increases slightly at lower supply voltages. figure 12. overvoltage protection using 2 external blocking diodes adding diode d2 to the circuit shown in figure 12 causes the logic threshold to be shifted relative to gnd. diodes d1 and d2 also protect against overvoltage conditions. for example, in the circuit shown in figure 12 , if the supply voltage goes below the absolute maximum rating, and if a fault voltage up to the absolute maximum rating is applied to an analog signal pin, no damage will result. power supply bypass power supply connections to the devices must maintain a low impedance to ground. this can be done using a bypass capacitor, which will also improve noise margin and prevent switching noise propagation from the v+ supply to other components. a 0.1f bypass capacitor, connected from v+ to gnd (see figure 18 on page 11) , is adequate for most applications. logic inputs driving in x rail-to-rail will help minimize power consumption. layout considerations high-speed switches require proper layout and design procedures for optimum performance. short, wide traces should be used to reduce stray inductance and capacitance. bypass capacitors should be as close to the device as possible. large ground planes should be used wherever possible. as1751/as1752/as1753 gnd v gen com x d2 d1 v+ v+ no x
www.austriamicrosystems.com revision 1.41 10 - 16 as1751/as1752/as1753 data sheet - application information timing diagrams and test setups figure 13. as1751 / as1753 test circuit and timing diagram figure 14. as1752 / as1753 test circuit and timing diagram figure 15. as1753 test circuit and timing diagram figure 16. charge injection as1751/ as1753 com x no x 35pf 50 v comx in x v nox 50 v+ v+ gnd v comx in x 0 0 v nox v ih + 0.5v t on t off t r < 5ns t f < 5ns 50% 50% 90% 90% as1752/ as1753 com x nc x 35pf 50 v comx in x v ncx 50 v+ v+ v comx in x 0 0 v ncx v ih + 0.5v t off t on 50% 50% 90% 90% gnd t r < 5ns t f < 5ns as1753 com2 no1 35pf 50 v comx nc2 in x v s v s 50 v+ v+ v comx in x 0 0 v s v ih + 0.5v t bbm 90% t bbm 90% t bbm = t on(nox) - t off(ncx) or t bbm = t on(ncx) - t off(nox) gnd t r < 5ns t f < 5ns com1 as175x com x nc x or no x c load 1000pf v out in x v gen 50 v+ v+ v in 0 v+ v out v out as1751 as1752 v out is the measured voltage due to charge transfer error q when the channel turns off. q = v out x c load gnd r gen v in
www.austriamicrosystems.com revision 1.41 11 - 16 as1751/as1752/as1753 data sheet - application information figure 17. nox, ncx, and comx capacitance figure 18. off-isolation, on-loss, and crosstalk notes: 1. measurements are standardized against short-circuit at socket terminals. 2. off-isolation is measured between com x and the off nc x /no x terminal on each switch. off-isolation = 20log (v out / v in ). 3. on-loss is measured between com x and the on nc x /no x terminal on each switch. on-loss = 20log (v out /v in ). 4. signal direction through the switch is reversed; worst values are recorded. as1751/ as1752/ as1753 com x nc x or no x in x v+ v+ as required gnd 1mhz capacitance analyzer as1751/ as1752/ as1753 com x no x or nc x in x v+ v+ 50 50 50 50 v in v out 0.1f measure reference gnd network analyzer ? use 50 termina- tion for off-isolation ?
www.austriamicrosystems.com revision 1.41 12 - 16 as1751/as1752/as1753 data sheet - application information package drawings and markings the devices are available in an 16-pin tqfn package and an 14-pin tssop package. figure 19. 16-pin tqfn package -c- a3 a1 side view plane a ccc c 0.08 c 11 nx seating d d/2 index area e aaa c aaa c top view 2x 2x 4 (d/2 xe/2) e/2 -b- -a- nxl e nxb d2/2 d2 e2/2 2 1 e2 bbb c a b ddd c -b- -a- n n-1 btm view 6 5 (d/2 xe/2) index area 4 see detail b see detail b 89 datum a or b even terminal side detail b terminal tip e e/2 l1 12 5 common dimensions symbol min nom max notes aaa 0.15 1, 2 bbb 0.10 1, 2 ccc 0.10 1, 2 ddd 0.05 1, 2 a 0.70 0.75 0.80 a1 0.00 0.02 0.05 a3 0.20 ref l1 0.03 0.15 d bsc 3.00 1, 2, 10 e bsc 3.00 1, 2, 10 d2 1.30 1.45 1.55 1, 2, 10 e2 1.30 1.45 1.55 1, 2, 10 l 0.30 0.40 0.50 1, 2, 10 n 16 1, 2, 10 nd 4 1, 2, 10 ne 4 1, 2, 10 pin 1 marker
www.austriamicrosystems.com revision 1.41 13 - 16 as1751/as1752/as1753 data sheet - application information notes: 1. dimensioning and tolerancing conform to asme y14.5m-1994 . 2. all dimensions are in millimeters; angles in degrees. 3. n is the total number of terminals. 4. the terminal #1 identifier and terminal numbering convention shall conform to jedec 95 spp-012 . details of termi- nal #1 identifier are optional but must be located within the zone indicated. the terminal #1 identifier may be either a mold or marked feature. 5. dimension b applies to metallized terminal and is measur ed between 0.15 and 0.30mm from terminal tip. if one end of the terminal has the optional radius, the b dimens ion should not be measured in that radius area. 6. dimensions nd and ne refer to the number of terminals on each d and e side, respectively. 7. depopulation is possible in a symmetrical fashion. 8. figure 19 is shown for illustration only and does not represent any specific variation. 9. all variations may be constructed per figure 19 , however variations may alternately be constructed between square or rectangle shape per dimensions d and e. 10. refer to the dimensions table for a complete set of dimensions. 11. bilateral coplanarity zone applies to the exposed heat sink slug as well as the terminals. 12. depending on the method of lead termination at the edge of the package, pullback (l1) may be present. l minus l1 to be 0.33mm. 13. for variations with more than one lead count for a given body size and terminal pitch, each lead count for that vari- ation is denoted by a dash number (e.g., -1 or -2). 14. njr designates non-jedec registered package.
www.austriamicrosystems.com revision 1.41 14 - 16 as1751/as1752/as1753 data sheet - application information figure 20. 14-pin tssop package notes: 1. all dimensions are in millimeters; angles in degrees. 2. dimensions and tolerancing per asme y14.5m-1994 . 3. dimension d does not include mold flash, protrusions, or gate burrs. mold flash, protrusions, or gate burrs shall not exceed 0.15mm per side. 4. dimension e1 does not include interlead flash or prot rusion. interlead flash or protrusion shall not exceed 0.25mm per side. 5. dimension b does not include dambar protrusion. allowa ble dambar protrusion shall be 0.08mm total in excess of dimension b at maximum material condition. dambar cannot be located on the lower radius of the foot. minimum space between protrusion and adjacent lead is 0.07mm for 0.5mm pitch packages. 6. terminal numbers shown are for reference only. 7. datums a and b to be determined at datum plane h. 8. dimensions d and e1 to be determined at datum plane h. 9. this dimension applies only to variations with an even number of leads per side. for variations with an odd number of leads per package, the center lead must be coincident with the package centerline, datum a. 10. cross section a-a to be determined at 0.10 to 0.25mm from the leadtip. symbol 0.65mm lead pitch 1, 2 note symbol 0.65mm lead pitch 1, 2 note min nom max min nom max a- -1.10 10o - 8o a1 0.05 - 0.15 l1 1.0 ref a2 0.85 0.90 0.95 aaa 0.10 l 0.50 0.60 0.75 bbb 0.10 r 0.09 - - ccc 0.05 r1 0.09 - - ddd 0.20 b 0.19 - 0.30 5 e 0.65 bsc b1 0.19 0.22 0.25 2 12o ref c 0.09 - 0.20 3 12o ref c1 0.09 - 0.16 variations d 4.90 5.00 5.10 3, 8 e 0.65 bsc e1 4.30 4.40 4.50 4, 8 n 14 6 e 6.4 bsc
www.austriamicrosystems.com revision 1.41 15 - 16 as1751/as1752/as1753 data sheet - ordering information 10 ordering information the devices are available as the standard products shown in table 7 . ? future product table 7. ordering information model description delivery form package as1751s spst switch tube 14-tssop as1751s-t quad spst switch tape and reel 14-tssop as1751v ? quad spst switch tray 16-tqfn 3mmx3mm as1751v-t ? quad spst switch tape and reel 16-tqfn 3mmx3mm AS1752S quad spst switch tube 14-tssop AS1752S-t quad spst switch tape and reel 14-tssop as1752v ? quad spst switch tray 16-tqfn 3mmx3mm as1752v-t ? quad spst switch tape and reel 16-tqfn 3mmx3mm as1753s quad spst switch tube 14-tssop as1753s-t quad spst switch tape and reel 14-tssop as1753v ? quad spst switch tray 16-tqfn 3mmx3mm as1753v-t ? quad spst switch tape and reel 16-tqfn 3mmx3mm
www.austriamicrosystems.com revision 1.41 16 - 16 as1751/as1752/as1753 data sheet copyrights copyright ? 1997-200 7, austriamicrosystems ag, schloss premstaett en, 8141 unterpremstae tten, austria-europe. trademarks registered ?. all rights reserved. the materi al herein may not be reproduced, adapted, merged, trans- lated, stored, or used without the prior written consent of the copyright owner. all products and companies mentioned are trademarks or registered trademarks of their respective companies. disclaimer devices sold by austriamicrosystems ag are covered by t he warranty and patent indemni fication provisions appearing in its term of sale. austriamicrosystems ag makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. austriami- crosystems ag reserves the right to chang e specifications and prices at any time and without notice. therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems ag for current information. this product is intended for use in normal commercial a pplications. applications r equiring extended temperature range, unusual environmental requirements, or high reliability app lications, such as military, medical life-support or life- sustaining equipment are specifically not recommended withou t additional processing by austriamicrosystems ag for each application. for shipments of less than 100 parts the manufacturing flow might show deviations from the standard production flow, such as test flow or test location. the information furnished here by austriamicrosystems ag is believed to be correct and accurate. however, austriamicrosystems ag shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or ar ising out of the furnishing, performance or use of the tech- nical data herein. no obligation or liability to recipient or any third party shall arise or flow out of austriamicrosystems ag rendering of technical or other services. contact information headquarters austriamicrosystems ag a-8141 schloss premstaetten, austria tel: +43 (0) 3136 500 0 fax: +43 (0) 3136 525 01 for sales offices, distributors and representatives, please visit: http://www.austriamicrosystems.com/contact

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